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  215 moffett park drive, sunnyvale, ca 94089 www.apm.com/sales/ contactsales.html product brief s1213 quad serial oc-3/12 - to - 8 bit transceiver s 1 2 1 3 u s a for technical support inquiries, submit your product related questions to support@appliedmicro.com. appliedmicro reserves the right to make changes to its products, its data sheets, or related documentation, without notice and warrants its products solely pursuant to its terms and conditions of sale, only to substantially comply with the latest available data sheet. please consult appliedmicro?s term a nd conditions of sale for its warranties and other terms, conditions and limitations. appliedmicro may discontinue any semiconductor product or service without notice, and advise s its customers to obtain the latest version of relevant information to verify, before placing orders, that the information is current. appliedmicro does not assume any liabil ity arising out of the application or use of any product or circuit described herein, neither does it convey any license under its patent rights nor the rights of others. appliedmicro reserves the right to ship devices of higher grade in place of those of lower grade. appliedmicro semiconductor products are not designed, intended, authorized, or warra nted to be suitable for use in life-support applications, devices or systems or other critical applications. appliedmicro is a registered trademark of applied micro circui ts corporation. power and the power logo are registered trademarks of power.org. all other trademarks are the property of their respective holders. copyright ? 2010 applied micro circuits corporation. all rights reserved. overview the s1213 operates in either oc-3 or oc- 12 with a clock data recovery feature. the s1213 can also be provisioned as a mix between oc-3 and oc-12 data for individual channels. the s1213 can be configured in mii (media independent interface) mode (mii mode) and in non-mii mode. the figure below, system block diagram, shows a typical network application. the quad s1213 transceiver implements sonet/sdh serialization/deserialization, and transmission functions. this chip can be used to implement the front end of sonet equipment, which consists primarily of the serial transmit interface and the serial receive in terface. the chip handles all the functions of these two elements, including parallel-to-serial and serial-to-parallel conversion, clock generation, and system timing. the system timing circuitry consists of management of the data stream and clock distribution throughout the front end. features ? cmos 0.13 micron technology ? complies with bellcore and itu-t specifica- tions for jitter tolerance, jitter transfer, and jitter generation ? on-chip high-frequency plls for clock genera- tion and clock recovery ? supports data rates for 155.52 mbps (oc-3) and 622.08 mbps (oc-12). ? 8-bit lvcmos parallel data path ? diagnostic loopback, line loopback, serial clock loop timing and parallel loop back modes ? selectable reference frequencies of 77.76 or 155.52 mhz ? directly compatible with 2.5 v or 3.3 v lvds dc, 3.3 v lvpecl dc as well as ac interface ? minimizes external components: no external loop filter component, internally biased out- puts, internally provided common mode bias for ac input and internally provided bias for external lvpecl driver ? 255 ball grid array package ? 1.2 v and 3.3 v/2.5 v supply. no power sequencing required ? lock detect ? signal detect input (sd[3:0]) ? typical 635 mw power in lvds mode ? quad configuration, mixed oc-3/12 ? transmit fifo, maximizing transmit timing ? bist features applications ? sonet/sdh modules & test equipment ? atm over sonet/sdh ? section repeaters ? add drop multiplexers (adm) ? broad-band cross-connects ? fiber optic terminators ? fiber optic test equipment the s1213 device provides fully integrated serialization/ de-serialization capabili- ties for quad transceiver. the device perf orms all necessary pa rallel-to-serial and serial-to-parallel functions in conforma nce with sonet/sdh transmission stan- dards. the standard operating range is 155.52 mbps or 622.08 mbps. orx otx otx orx orx otx otx orx orx otx otx orx orx otx otx orx s1213 mii port s1213 mii port data data data data data data data data data data data data data data data data framer or asic framer or asic framer or asic framer or asic data clock 8 data 8 clock data clock 8 data 8 clock data clock 8 data 8 clock data clock 8 data 8 clock framer or asic framer or asic framer or asic framer or asic data clock 8 data 8 clock data clock 8 data 8 clock data clock 8 data 8 clock data clock 8 data 8 clock s1213 system block diagram


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